Intel CEO Reviews 4nm, 2nm, 1.8nm Process Yields Every Week: Expects to Beat AMD/TSMC by 2024 with 3nm Granite Rapids & Sierra Forest CPUs

Intel CEO Patrick Gelsinger has been running a tight ship ever since he took over the helm roughly a year back. At the Investor Day 2022 reveal, he unveiled a revised, amped-up roadmap with an aim to retake architectural and process leadership from archrivals AMD and TSMC, respectively. According to this roadmap, Intel is set to release its 3nm process node in 2024 with Granite Rapids and Sierra Forest, and its 20A (2nm) process the same year with Arrow Lake in the client segment.

We did change the timing of Granite Rapids, and we had a big internal debate show on should we even keep the Granite Rapids name because it was the same platform, but it was a new core on a new process. So to some degree, it was a very different product. But some said, hey, you delayed Granite Rapids. Hey, I say I enhance Granite Rapids, with a much higher performance product, a much — 18% process, a major new core, that’s 10-plus percent in the core. So a much better product and aligned to the customers’ timing. And they said, hey, Sapphire Emerald Granite was too compressed.

Pat Gelsinger, Intel CEO

Going by this schedule, the 3nm Intel Granite Rapids and Sierra Forest server processors will clash with AMD’s 3nm Zen 5 and Zen 5c based Epyc CPUs in 2024. Doesn’t look like unquestioned leadership at all, to be honest. Rather, we’re set to see a close match, probably a stalemate where the rivals will switch to price cuts, and CPU-GPU pairings: Epyc-Instinct for AMD, and Xeon-Ponte Vecchio Next for Intel. (adderall)

Giving them about 2-year cadence in the platform is exactly what the major customers have been asking us for, give us more life of the platform, and then being able to deliver that with the — to the parallel road map of Granite Rapids with the P-cores and Sapphire Rapids with — or Sierra Forest with the E-cores, a great road map. Customers have responded super well to it

Pat Gelsinger, Intel CEO

Gelsinger was also quick to mention the chipmaker’s parallel data center roadmap consisting of Granite Rapids with P-cores, and Sierra Forest with E-cores. As per the Intel boss, the existence of a low-power E-core design gives the company an edge over its rivals. However, AMD was the first to announce its server chip “Bergamo” with 128 Zen 4c “small” cores last year, pretty much making it a false claim.

The most notable disclosure from the conversation is with regard to the strict quality control and reviewing schedule set for advanced future nodes, most notably 4nm, 3nm, 20A, and 18A. Although these nodes are split into two different production centers (and teams), they’re still being overlooked by Intel leadership on a regular basis. The Intel CEO went as far as to claim that he reviews the defect densities of all these nodes on a weekly basis. Defect densities refer to the number of defects present in a wafer. It dictates how many chips you can salvage out of it, while the rest of the wafer is discarded. More on this here.

We also laid out that we’ve — what I call Tick-Tock [ph] the process development. We have one team working on 4 3 and another team working on 20A, 18A, very much a Tick-Tock like development methodology. We’ve paralleled those teams, so put capital into it, put engineering into it to de-risk them. And hey, I’m reviewing the defect densities on these every week. We reorganized that group. So I’ll say we’ve reorganized that we brought in new leadership. We’ve capitalized on the new ways, a new development methodology.

Pat Gelsinger, Intel CEO

Sapphire Rapids, when we introduce it, is the best product. Again, hey, we expect AMD is going to respond, but it’s going to be a pretty close race, and when we get into the Granites and Sierra Forest, unquestionably, the best again at that point. We’re going to go from a deficit in process technology to a leadership in process technology in the server space in this horizon as well. So unquestionably, best products, best process technology, best capacity profile. So that’s the area that we’re still most challenged, but the execution every day.

Pat Gelsinger, Intel CEO

The above conversation is from the Morgan Stanley Technology and Telecom Conference 2022

Areej Syed

Processors, PC gaming, and the past. I have written about computer hardware for over seven years with over 5000 published articles. I started during engineering college and haven't stopped since. On the side, I play RPGs like Baldur's Gate, Dragon Age, Mass Effect, Divinity, and Fallout. Contact: areejs12@hardwaretimes.com.
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