A while back, Intel CEO Pat Gelsinger revealed that his company has been working on their own version of AMD’s 3D V-Cache for consumers and data centers. Although he didn’t provide any specific details, he did say that it’d be part of a future architecture, post 15th Gen Arrow Lake. He also subtly hinted that Intel’s “Large Cache” solution won’t be implemented like V-Cache, which uses TSMC’s CoWoS packaging technology.
Moore’s Law is Dead claims that Intel’s V-Cache competitor will be called “Big LLC,” with LLC standing for Last Level Cache. It is expected to be paired with the 17th Gen Nova Lake family with a launch date of early 2027. Last month, it was reported that Samsung and Intel are collaborating on a “Cache DRAM” technology to replace HBM and act as a higher-level cache.
Cache DRAM utilizes a single chip with the capacity of multiple HBM dies 3D stacked directly atop the CPU or GPU compute die. Storing the necessary data closer to the processing units drastically reduces latency and efficiency. Samsung claims that cache DRAM reduces power consumption by 60% while boosting data transfer by 50% over existing HBM solutions. Currently, the dissipation of the heat generated by the 3D-stacked DRAM is the primary concern.
